An Efficient Sense Amplifier for SRAM using Body Biasing
نویسندگان
چکیده
This paper proposes design of a low power sense amplifier. It is designed for the low power and delay of the circuit by using the variable threshold mos devices. Sense amplifiers are used in the memories to increase the speed for accessing data from different locations. So the speed of data read of SRAM is highly reliable on the design of sense amplifiers. The introduced circuit is tested under the various conditions of fast changing current to maximum and minimum value and then obtained results are analysed. The designed circuit results in the low power consumption of about 186μw and delay of .87ns with the area of 305.9875μm.
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