VLSI Implementation of Low Power Decompressor Using PRESTO Generator

This paper deals with a low-power programmable (PRESTO) generator for creating pseudo-random test patterns with desired toggling levels and improved fault coverage versus the state-of-the-art built in self test (BIST) based pseudorandom test pattern generator. A PRESTO generator involves a linear finite state machine (linear feedback shift register or a ring generator) and an auxiliary circuit driving the required binary sequence to a phase shifter to obtain the desired test pattern. The auxiliary circuit comprising of various components creates an auxiliary output so as to enable/disable certain values in the input binary sequence to the Phase Shifter. This paper also discusses about the Low Power Decompressor application of PRESTO generator to derive the required test pattern at a better compact design, improved time delay and reduced power consumption. In the LP Decompressor, the output of the phase shifter is fed to a Transition Controller which reduces the switching transitions further reducing the power consumed. The above proposed application is simulated using Synopsys tool for HDL design and the results obtained are compared with existing technique.