VHDL Based Simulation of a Delta-Sigma A/D Converter Clocked with a Phased-Locked Loop

نویسندگان

  • Martin Schubert
  • Martin J. Schubert
چکیده

Although the range of possible applications of the VHDL based MixED module [1] is smaller than the respective range of other mixed-signal simulators, e.g. [24], the MixED system has been shown to allow for a number of useful mixed-signal simulations, e.g. an analog inverter with operational amplifier (OA) [5], a switched capacitor circuit with OA [6], a phase-locked loop (PLL) [7] and a ∆Σ modulator [8]. The latter was verified using PSpice simulations and measured data [9,10].

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تاریخ انتشار 2001