A Cmos Capacitor-less Low Drop-out Voltage Regulator
نویسنده
چکیده
A 3-5V 50mA CMOS low Drop-out (LDO) linear regulator with a single compensation capacitor of 1pF is presented. The circuit realization is well-studied and developed with respect to the loop-gain response, the transient response, the output noise, the output accuracy, as well as the standby power consumption. The proposed LDO regulator is implemented in the AMI 0.6um CMOS process, the active layout area is 541 x 320 μm. The experimental results show that the maximum output load current is 50mA and the regulated output voltage is 2.8V. The regulator provides a full load transient response less than 5mV overshoots and undershoots. Moreover, it provides a power supply reject rate better than -65dB and an output noise of 0.02 uV/sqrt Hz at 100 kHz.
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