Optimization and control of VDD and VTH for low-power, high-speed CMOS design
نویسنده
چکیده
It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD’s and VTH’s is described. Scaling scenarios of variable and/or multiple VDD’s and VTH’s is discussed to show future technology directions.
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