Abstraction techniques for verification of multiple tightly coupled counters, registers and comparators

ion Techniques for Veri cation of Multiple Tightly Coupled Counters, Registers and Comparators Yee-Wing Hsieh Steven P. Levitan Department of Electrical Engineering Department of Electrical Engineering University of Pittsburgh University of Pittsburgh [email protected] [email protected] Abstract We present new non-deterministic nite state machine (NFSM) abstraction techniques for comparators based on the comparison di erence of the two operands (e.g., counters) instead of the comparison order. One of the major advantages of the comparison di erence abstractions is the ability to model the comparison of multiple tightly coupled counters. The abstraction techniques are integral to our semantic model abstraction methodology, where abstract models are generated based on semantic matching of behavioral VHDL models with known abstraction templates. Using NFSM models for counters, comparators, and registers, we have shown our approach can yield many orders of magnitude (102 1011) reductions in state space size and substantial improvements in performance of formal veri cation runs.