On-Chip ESD Protection Design for Ics
نویسندگان
چکیده
This tutorial paper reviews the state of knowledge of on-chip ESD (electrostatic discharging) protection circuit design for integrated circuits. The discussion covers critical issues in ESD design, such as, ESD test models, ESD failure mechanism, ESD protection structures, ESD device modeling, ESD simulation, ESD layout issues, and ESD influences on circuit functionality, etc. This review serves to provide industrial IC designers with a thorough and heady reference in dealing with ESD protection design.
منابع مشابه
Co-Design Strategy With Low-C Consideration for On-Chip ESD Protection in RF ICs
Co-design strategy with low-capacitance (low-C) consideration for on-chip ESD protection in RF ICs is a solution to mitigate RF performance degradations caused by ESD protection device. A low-C design on ESD protection device was presented in this paper. An RF power amplifier (PA) codesigned with the low-C ESD protection device was also presented in this paper. Before ESD stress, RF performance...
متن کاملImpedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits
SUMMARY An impedance-isolation technique is proposed for on-chip ESD protection design for radio-frequency (RF) integrated circuits (ICs), which has been successfully verified in a 0.25-μm CMOS process with thick top-layer metal. With the resonance of LC-tank at the operating frequency of the RF circuit, the impedance (especially, the parasitic ca-pacitance) of the ESD protection devices can be...
متن کاملAn On-Chip ESD Protection Circuit with Low Trigger Voltage in BiCMOS Technology
A novel low-trigger dual-direction on-chip electrostatic discharge (ESD) protection circuit is designed to protect integrated circuits (ICs) against ESD surges in two opposite directions. The compact ESD protection circuit features low triggering voltage ( 7.5 V), short response time (0.18–0.4 ns), symmetric deep-snapback – characteristics, and low on-resistance ( ). It passed the 14-kV human b...
متن کاملOn-Chip ESD Protection Design by Using Polysilicon Diodes in CMOS Process
A novel on-chip electrostatic discharge (ESD) protection design by using polysilicon diodes as the ESD clamp devices in CMOS process is first proposed in this paper. Different process splits have been experimentally evaluated to find the suitable doping concentration for optimizing the polysilicon diodes for both on-chip ESD protection design and the application requirements of the smart-card I...
متن کاملA Pad-Oriented Novel Electrostatic Discharge Protection Structure For Mixed-Signal ICs
This paper reports a design of a bonding pad oriented square-shape ESD (electrostatic discharge) protection structure. The novel ESD protection structure provides adequate protection for IC chips against ESD pulses in all directions. The structure features deep snapback symmetric characteristics, low discharging impedance, low holding voltage, and flexible triggering voltage. It passed 14KV HBM...
متن کامل