Single Event Upset (SEU) in SRAM

Radiation in space is potentially hazardous to microelectronic circuits and systems such as spacecraft electronics. Transient effects on circuits and systems from high energetic particles can interrupt electronics operation or crash the systems. This phenomenon is particularly serious in complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs) since most of modern ICs are implemented with CMOS technologies. The problem is getting worse with the technology scaling down. Radiationhardening-by-design (RHBD) is a popular method to build CMOS devices and systems meeting performance criteria in radiation environment. Single-event transient (SET) effects in digital circuits have been studied extensively in the radiation effect community. The goal of this research is the implementation of a radiation hardened MOS devices using ORCAD that is able to accurately compute in the presence of radiation induced SEUs. This research specifically concentrates on the ability of the system to detect and mark or correct SEUs in semiconductor memory systems. This work does not address error detection and correction (EDAC) of memory systems. It only address the areas where fault can be likely found in MOS based devices and then make a circuit which perfectly work in radiation environment too. Keywordslinear energy transfer (LET), single event upset (SEU), single event error (SEE), single event transient (SET)