A Parametric Design of a Built-in Self-Test FIFO1 Embedded Memory
نویسندگان
چکیده
Aim of this paper is to present a self-testable FIFO memoN macrocell, which can be embedded into larger devices. A dual port RAM-Ope FIFO has been designed. A new test procedure for the macrocell has been defined aiming ar detecting all possible faults in the control logic and the RAM cell. Given such a test procedure the appropriate Built-h Self Test archirecture has been defined, independently of the memov size. Fault coverage and area overhead for the proposed solution are presented.
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