Power-efficient delay-insensitive codes for data transmission

Power-efficient Delay-insensitive Codes for Data Transmission

Limitations of VLSI Implementation of Delay-Insensitive Codes

Implementation of delay-insensitive (DI) or unordered codes is the subject of this report. We present two diierent architectures for decoding systematic DI codes: (a) enumeration-based decoder, and (b) comparison-based decoder. We argue that enumeration-based decoders are often impractical for many realistic codes. Comparison-based decoders that detect arrival of a code word by comparing the re...

Asynchronous Early Output Dual-Bit Full Adders Based on Homogeneous and Heterogeneous Delay-Insensitive Data Encoding

This paper presents the designs of asynchronous early output dual-bit full adders without and with redundant logic (implicit) corresponding to homogeneous and heterogeneous delay-insensitive data encoding. For homogeneous delay-insensitive data encoding only dual-rail i.e. 1-of-2 code is used, and for heterogeneous delay-insensitive data encoding 1-of-2 and 1-of-4 codes are used. The 4-phase re...

Delay-Scheduled Controllers for Inter-Area Oscillations Considering Time Delays

Unlike the existing views that was introduced the existence of delay caused by the transmission of wide area measurement system data (WAMS) into the controllers input of the power oscilation damping (POD) by communication networks as a reason for poor performance of the POD controllers. This paper shows that the presence of time delay in the feedback loop may improve the performance of a POD co...

An Asynchronous Low Power and High Performance VLSI Architecture for Viterbi Decoder Implemented with Quasi Delay Insensitive Templates

Convolutional codes are comprehensively used as Forward Error Correction (FEC) codes in digital communication systems. For decoding of convolutional codes at the receiver end, Viterbi decoder is often used to have high priority. This decoder meets the demand of high speed and low power. At present, the design of a competent system in Very Large Scale Integration (VLSI) technology requires these...