Bosch Process Characterization for Donut Tsv’s

نویسندگان

  • John Slabbekoorn
  • Bart Schepers
  • Khashayar Babaei Gavan
  • Stefano Sardo
  • Stefaan Van Huylenbroeck
  • Tom Vandeweyer
  • Andy Miller
  • Kenneth June Rebibis
  • Warren W. Flack
  • Robert Hsieh
  • Manish Ranjan
چکیده

In a continuous quest for cost reduction, the semiconductor industry continues to pursue device scaling techniques. However as scaling becomes more complex and expensive, alternative techniques for cost reduction are being investigated. Progress in 3D packaging (3D-SIC, 3D-SoC) and Interposer technologies have the promise to offer reduced costs and smaller form factors. One of the key features for all of these packaging technologies is Through Silicon Vias (TSV). In this paper we discuss processing a TSV-Last version of Donut TSV’s (DTSV) which are defined by etching a annulus or donut shaped trench in the thinned silicon device wafer using a Bosch etch process. The donut trench is then filled with a polymer that acts as liner and stress buffer. Next, the core of the donut is removed by a self-aligned silicon etching process and filled with electroplated Copper. There are several challenges arising from the behavior of the Bosch process used to define the donut trench. The first is that the process is sensitive to excessive lateral etching of Si at the PMD (pre-metal dielectric) interface (notching). In order to minimize this effect, the main etching step should stop just before reaching the PMD and the etch should be completed by a soft etch, which produces less defined TSV profiles, is slower than the main etching step and should thus be kept as short as possible. Some over etching is required to account for silicon thickness variation and etch non-uniformity across the wafer. The second challenge of the Bosch process is Aspect Ratio Dependent Etching (ARDE). For the DTSV’s, the aspect ratio is very high and the obtained etch depth will be sensitive to CD variations. The width of the ring in the donut is aggressively small for advanced packaging lithography and tight process control will be required. In this study the Bosch etch and lithography are characterized and the requirements on the lithography performance are determined. Experimental process windows and lithography modeling are presented on the optimization required to maintain the required CD control. Finally, the optimal etching times for the Bosch process are deduced.

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تاریخ انتشار 2015