A New Nanoscale DG MOSFET Design with Enhanced Performance - A Comparative Study
نویسندگان
چکیده
Triple Material (TM) Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with high-k dielectric material as Gate Stack (GS) is presented in this paper. A lightly doped channel has been taken to enhance the device performance and reduce short channel effects (SCEs) such as drain induced barrier lowering (DIBL), sub threshold slope (SS), hot carrier effects (HCEs), channel length modulation (CLM). We investigated the parameters like Surface Potential, Electric field in the channel, SS, DIBL, Transconductance (gm ) for TM-GS-DG and compared with Single Material (SM) DG and TM-DG. The simulation and parameter extraction have been done by using the commercially available device simulation software ATLAS.
منابع مشابه
Impact of Silicon Wafer Orientation on the Performance of Metal Source/Drain MOSFET in Nanoscale Regime: a Numerical Study
A comprehensive study of Schottky barrier MOSFET (SBMOSFET) scaling issue is performed to determine the role of wafer orientation and structural parameters on the performance of this device within Non-equilibrium Green's Function formalism. Quantum confinement increases the effective Schottky barrier height (SBH). (100) orientation provides lower effective Schottky barrier height in compa...
متن کاملAn approach based on particle swarm computation to study the nanoscale DG MOSFET-based circuits
The analytical modeling of nanoscale Double-Gate MOSFETs (DG) requires generally several necessary simplifying assumptions to lead to compact expressions of current-voltage characteristics for nanoscale CMOS circuits design. Further, progress in the development, design and optimization of nanoscale devices necessarily require new theory and modeling tools in order to improve the accuracy and th...
متن کاملModeling of Leakage Current Mechanisms in Nanoscale DG MOSFET and its Application to Low Power SRAM Design
Double-Gate (DG) MOSFET has emerged as one of the most promising devices for logic and memory circuit design in sub 10nm regime. In this paper, we investigate the gate-to-channel leakage, EDT, BTBT and sub-threshold leakage for DG MOSFET. Simulations are performed using 2D Poisson-Schrödinger simulator with tight-binding Green’s function approach. Then we analyze the effect of parameter variati...
متن کاملStrained-Si single-gate versus unstrained-Si double-gate MOSFETs
Self-consistent full-band Monte Carlo simulations are employed to compare the performance of nanoscale strained-Si single-gate (SG) and unstrained-Si double-gate (DG) MOSFETs for a gate length of 25 nm. Almost the same on-current as in the DG-MOSFET can be achieved by strain in a SG-MOSFET for the same gate overdrive. This is due to the compensation of the higher electron sheet density in the t...
متن کامل