A CAD System for Modeling Voltage Drop and Electromigration in VLSI Met allization Patterns

I 'HE currents present in VLSI conI ductor patterns are responsible for two major problems: Electromigration of metal atoms and voltage drop. Electromigration places a limit on the useful lifetime of the circuit, and, if not properly accounted for, can present a serious reliability problem. As a phenomenon that happens over an extended pe.iod of time, elecffomigration depends on all possible current waveforms; any estimation of the elecffomigration rate must be independent of individual input patterns. Excessive voltage drop in conductor patterns can produce marginal, or unacceptable, circuit performance and require extensive redesign, greatly increasing circuit design and development costs. Voltage drop is an instantaneous phenomenon; it depends on the peak current at a particular moment. The need for CAD progftrms, capable of ensuring adequate current-carrying capacity in VLSI circuits, is becoming increasingly apparent as density increases and line widths shrink. These prognrms are required in the initial design phase and during layout verification. They must be capable of ensuring that both electromigration and voltage drop are within acceptrble limits. One approach to the problem would be to use circuit analysis to determine current loads on the conductor pattern at various locations and solve a twodimensional Poispon equation, using finite element or finite difference analysis, to determine voltage and current density at every point in the conductor. This method would use an enorrnous amount of computer resources for a VLSI circuit, and it would do little to aid the circuit designer during the initial design phase. Furttrermore, it would not address the pattern independence needs of electromigration analysis. We have developed a simpler approach which automates many of the tasks previously performed W the circuit designer. The result is a system of programs which can be used at any level of circuit design. Two programs are used to make up this system. SPIDERruses SPICE2 simulation of exfiacted resistances and capacitances to determine the current density and volage at each point of the exffacted metal structures. Regular sections of the metal structures are extracted as twoterminal resistive elements, while difficult sections are extracted as collections of three-terminal finite elements. To model the effects of the circuit on the extracted RC network, another program, CREST,3 is used to provide current sources to load the network during SPICE simulations. CREST is capable of supplying a statistically meaningful, expected current waveform for use in analyzing electromigration rate, or, if the user is willing to supply explicit input waveforms. CREST can estimate the current waveform for these inputs, which can then be used to determine voltage drop. While SPIDER can be used for any metal line on any design, CREST is intended to provide current sources for CMOS connections to power and ground. As conditions warrant, CREST will be expanded for use in other technologies.