The Design, Fabrication and Characterization of Silicon Oxide Nitride Oxide Semiconductor Thin Film Gates for Use in Modeling Spiking Analog Neural Circuits

This Thesis details the design, fabrication and characterization of organic semiconductor field effect transistors with silicon oxide-nitride-oxide-semiconductor (SONOS) gates for use in spiking analog neural circuits. The results are divided into two main sections. First, the SONOS structures, parallel plate capacitors and field effect transistors, were designed, fabricated and characterized. Second, these results are used to model spiking analog neural circuits. The modeling is achieved using PSPICE based software. The initial design work begins with an analysis of the basic SONOS structure. The existence of the ultrathin layers of the SONOS structure is confirmed with the use of Transmission Electron Microscopy (TEM) and Energy Dispersive Spectroscopy (EDS) scans of device stacks. Parallel plate capacitors were fabricated prior to complete transistors due to the significantly less processing required. The structure and behaviour of these capacitors is similar to that of the transistor gates which allows for the optimization of the structures prior to the fabrication of the transistors. These capacitors were fabricated using the semiconductor materials of; crystalline silicon, amorphous silicon, Zinc Oxide, copper phthalocyanine (CuPc) and tris 8-hydroxyquinolinato aluminium (AlQ3). These devices are then subjected to standard capacitance voltage (C-V) analysis. The results of this analysis demonstrate that the inclusion of SONOS structures in the capacitors (and transistors) result in a hysteresis which is the result of charge accumulation in the nitride layer of the SONOS structure.. iv This effect can be utilized as an imbedded memory. Standard control devices were fabricated and analysed and no significant hysteresis effect was observed. The hysteresis effect is only observed after the SONOS devices are subject to high voltages (approximately 14 volts) which allows tunneling through a thin oxide layer into traps in the silicon nitride layer. This analysis was conducted to confirm that the SONOS structure causes the memory effect, not the existence of interface states that can be charged and discharged. The next step was to design and fabricate amorphous semiconductor field effect transistors with and without the SONOS structure. First FETs without the SONOS gates were fabricated using amorphous semiconductor materials; Zinc Oxide, CuPc and AlQ3 and then the devices were characterized. This initial step confirmed the functionality of these basic devices and the ability to fabricate working control samples. Next, SONOS gate TFTs were fabricated using CuPc as the semiconductor material. The characterization of these devices confirmed the ability to shift the transfer characteristics of the devices through a …