SPICE-Compatible Macro Model for Split-Gate Compact NVM Cell with Various Gap Sizes
نویسندگان
چکیده
In this paper we present a SPICE-compatible macro model based on three MOS transistors to describe split-gate non-volatile memory (NVM) cell characteristics for various sizes of the gap between the gates. The model has initially been developed based on simulated dc-IV-characteristics of reference cells (floating gate connected to control gate) and was verified later with measurements on reference as well as real floating gate cells.
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