Dual-clock MASH delta-sigma modulator employing a frequency modulated intermediate signal
نویسندگان
چکیده
A dual-clock MASH (multi-stage noise shaping) deltasigma modulator (DSM) is proposed for high performance analog-digital converter. This employs a DSM using a frequency modulated intermediate signal (FMDSM) for the last stage. The sampling clock frequency for the last stage can be increased due to the features of the FMDSM. It is shown that this can increase the SNR beyond the conventional MASH DSMs.
منابع مشابه
A 14-bit Bandpass Mash Sigma-delta Pipeline A/d Converter
In this paper a two stage bandpass MASH (multi-stage noise shaping) sigma-delta ( Σ∆ ) modulator is presented. A resolution of 14 bits has been achieved over a 5 MHz band around an intermediate frequency (IF) of 20 MHz with a clock frequency of 80 MHz. This performance is obtained using a 6-th order bandpass Σ∆ modulator followed by a 10 bit pipeline converter. The proposed circuit has been ext...
متن کاملAn 80-MHz, 14-bit bandpass mash sigma–delta/pipeline A/D converter with 5 MHz bandwidth for third generation mobile communication systems
In this paper a bandpass MASH (multi-stage noise shaping) sigma-delta (RD) modulator is presented. A SNR (signal to noise ratio) of at least 85 dB (equivalent to a resolution of 14 bits) has been achieved over a 5 MHz band around an intermediate frequency (IF) of 20 MHz using a clock frequency of 80 MHz. This performance is obtained using a sixth order bandpass RD modulator followed by a 10 bit...
متن کاملQuadrature delta sigma modular design with adjustable bandwidth and center frequency
In this paper, a flexible Continuous time (CT) feedforward (FF) quadrature delta sigma modulator (QDSM) with variable bandwidth (BW) is proposed. The modulator BW and center frequency (fc) are variable which can be adjusted with two separate parameters. The modulator signal-to-noise ratio (SNR) will be optimized by these parameters at every center frequency and bandwidth. The modulator BW is ch...
متن کاملA CT MASH ∑∆ Modulator with Adaptive Digital Tuning for Analog Circuit Imperfections
This paper reports the transistor-level design of a continuous-time 2-1 MASH sigma delta modulator with digital adaptive tuning of the cancellation logic. The modulator is designed for broadband wireless applications and provides 12 bits of resolution for a 10 MHz signal bandwidth. A direct approach to design the CT MASH modulator is used which reduces the coupling between the MASH stages. The ...
متن کاملDelta-Sigma Modulators using Frequency- Modulated Intermediate Values
This paper describes a new firstand second-order delta-sigma modulator concept where the first integrator is extracted and implemented by a frequency modulator with the modulating signal as the input. The result is a simple delta-sigma modulator with no need for digital-to-analog converters, allowing straight-forward multi-bit quantization. Without the frequency modulator, the circuit becomes a...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید
ثبت ناماگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید
ورودعنوان ژورنال:
- IEICE Electronic Express
دوره 3 شماره
صفحات -
تاریخ انتشار 2006