VLSI Implementation for Interpolation-based Matrix Inversion for MIMO-OFDM Receivers

Matrix inversion block is one of the computationally intensive blocks in communications system. To reduce the size of hardware implementation is a challenging problem. In MIMO-OFDM system, the receiver which uses zero-forcing (ZF) or minimum mean square error (MMSE) scheme should calculate the inverse matrices of all sub-carriers. This paper proposes VLSI architecture for interpolation-based matrix inversion. For the result, more than 70% area was reduced by adopting interpolation-based scheme in 4×4 matrix inversion processing of IEEE 802.11n receiver. Key-Words: Matrix Inversion, Interpolation, ZF, MMSE