Acoustic Level Dynamic Compression Characteristics with FPGA Implementation

In this paper, we propose an FPGA design of an audio signal level compressor, based on an approximation algorithm using a polynomial. To implement a compression characteristic in a digital audio system, the gain calculation with fractional numbers is performed by using a polynomial expression to approximate the power operation, then the compressor can be designed with a number of additions, multiplications and a division. The arithmetic circuits were implemented in FPGA technology and the 16-bit compressor used 541 logic elements and 352 flip-flops of the hardware resource of EP20K200EFC484-2X from Altera. The proposed compressor can be applied as a functional unit in an on-chip audio system. The performance of the proposed compressor is evaluated by analysis and simulation. Key–Words: Audio signal, Dynamic range control, Compression ratio, Gain, FPGA.