An Interface Architecture for a Low-Latency Network of Workstations using 10 GBIT/S Switched LAN Technology
نویسندگان
چکیده
ties and consequences in the context of designing a network AN INTERFACE ARCHITECTURE FOR A LOW-LATENCY NETWORK OF WORKSTATIONS USING 10 GBIT/S SWITCHED LAN TECHNOLOGY A network of workstations, NOW, based on standard busbased multiprocessor nodes, interconnected by standard LAN technology, may be a very cost effective alternative to current large, tightly coupled systems with dedicated internal interconnect. Assuming an upcoming generation of 10 Gbit/s/node switched LANs, we address the issue of latency in the network interface which, given present solutions, would dominate message latency and thus hamper NOW performance. The proposed interface architecture is evaluated in the context of a shared memory system implemented on top of a NOW
منابع مشابه
Network Interface for Message Passing Parallel Computation on a Workstation Cluster
As commercial microprocessors become increasingly popu lar in current MPP architectures high performance com mercial workstations have also received increased attention as cost e ective building blocks for large parallel processing systems The Fast User level Network FUNet project is an attempt at constructing an inexpensive workstation based parallel system capable of supporting e cient ex ecu...
متن کاملA Low Latency and Power ASIC Design of Modular Network Interfaces for Network on Chip
The implementation of a high-performance Network on Chip (NoC) requires an efficient design of the network interface (NI) unit that connects the switched network to the IP cores. However, different interfaces’ specification of integrated components and different flow control is used by NoC router raises a considerable difficulty for adopting NoC techniques. The architecture of NIs must be modul...
متن کاملApplication Mapping onto Network-on-Chip using Bypass Channel
Increasing the number of cores integrated on a chip and the problems of system on chips caused to emerge networks on chips. NoCs have features such as scalability and high performance. NoCs architecture provides communication infrastructure and in this way, the blocks were produced that their communication with each other made NoC. Due to increasing number of cores, the placement of the cores i...
متن کاملSwitched LAN simulation by colored Petri nets
The methodology of switched LAN models construction in the form of colored Petri net is introduced. For the simulation and analysis of the model the Design/CPN tool is used. The tasks of estimation of LAN switch’s buffer size and network response time were solved. The components of the model are switches, servers, and workstations. © 2004 IMACS. Published by Elsevier B.V. All rights reserved.
متن کاملDART: A LAN Interface for Low Overhead Communication
This article presents a low level protocol and network interface architecture for low overhead communication in a distributed memory computing environment — such as workstations and PCs connected via a high speed LAN. We use both sender information and destination information to demultiplex messages directly to where they are needed. The network interface filters incoming messages, separating d...
متن کامل