Stability of CIOQ switches with finite buffers and non-negligible round-trip time
نویسندگان
چکیده
We propose a systematic method to determine the lower bound for internal buffering of practical CIOQ switching systems. To this end we introduce a deterministic traffic scenario that stresses the global stability of finite output queues. We demonstrate its usefulness by dimensioning the buffer capacity of the CIOQ under such traffic patterns. Compliance with this property maximizes the performance achievable with finite buffers.
منابع مشابه
A Stability Study of CIOQ Switches with Finite Buffers and Non-Negligible Round-Trip Time
We propose a systematic method to determine the lower bound for internal buffering of practical CIOQ switching systems. To this end we introduce a deterministic traffic scenario that stresses the global stability of finite output queues. We demonstrate its usefulness by dimensioning the buffer capacity of the CIOQ under such traffic patterns. Compliance with this property maximizes the perform...
متن کاملStability degree of switches with finite buffers and non-negligible round-trip time
We answer the question on how much memory a packet switch/router needs; more specifically, we propose a systematic method that is simple, rigorous and general for determining the absolute lower bound of packet buffering required by practical switching systems. Accordingly, we introduce a deterministic traffic scenario that stresses the global stability property of finite output queues and demon...
متن کاملOn the Emulation of Finite-Buffered Output Queued Switches Using Combined Input-Output Queuing
Emulation of Output Queuing (OQ) switches using Combined Input-Output Queuing (CIOQ) switches has been studied extensively in the setting where the switch buffers have unlimited capacity. In this paper we study the general setting where the OQ switch and the CIOQ switch have finite buffer capacity B ≥ 1 packets at every output. We analyze the resource requirements of CIOQ policies in terms of t...
متن کاملScheduling Algorithms for CIOQ Switches
This proposal deals with the design of scheduling algorithms for Combined Input and Output Queued (CIOQ) switches. For crossbar based switches, we demonstrate the poor performance of commonly used scheduling algorithms under overload traffic conditions using targeted stress tests and present ideas to develop robust, stress resistant versions of these algorithms which are still simple enough to ...
متن کاملA Parallel Packet Switch Architecture with Input-output-queued Switches and Buffering in the Demultiplexors
A packet switch with parallel switching planes is a parallel packet switch (PPS). A PPS can scale-up to larger aggregate capacity and faster line speeds than can a single plane. It is an open problem to design a PPS that is feasible to implement using multiple lower speed packet switches. Many solutions proposed previously are essentially impractical because of high communication complexity. In...
متن کامل