High speed bit-serial parallel processing on array architecture

نویسندگان

  • Kazuhito Ito
  • Takenobu Shimizugashira
  • Hiroaki Kunieda
چکیده

Word-parallel bit-serial processing is a solution to high speed processing suitable for VLSI. In this paper a new bitserial parallel processing architecture is proposed. A VLSI chip for a digital filter is designed based on the proposed architecture and it is implemented on a gate array chip. Through the implementation, it is verified that bit-serial parallel processing on an array architecture achieves high speed processing and easy design.

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تاریخ انتشار 1997