Improving Power Efficiency in Stream Processors Through Dynamic Cluster Reconfiguration
نویسندگان
چکیده
Stream processors support hundreds of functional units in a programmable architecture by clustering functional units and utilizing a bandwidth hierarchy. Clusters are the dominant source of power consumption in stream processors. When the data parallelism falls below the number of clusters, unutilized clusters can be turned off to save power. This paper improves power efficiency in stream processors by dynamically reconfiguring the number of clusters in a stream processor to match the time varying data parallelism of an application. We explore 3 mechanisms for dynamic reconfiguration: using memory, conditional streams and a multiplexer network. A 32-user wireless basestation is a prime example of a workload that benefits from such reconfiguration. When the number of users supported by the basestation dynamically changes from 32 to 4, the reconfiguration from a 32-cluster stream processor to a 4-cluster stream processor yields 15–85% power savings over and above a stream processor that uses conventional power saving techniques such as dynamic voltage and frequency scaling. The dynamic reconfiguration support extends stream processors from traditional high performance applications to power-sensitive applications in which the data parallelism varies dynamically and falls below the number of clusters.
منابع مشابه
Improving Power Efficiency in Stream Processors Through Dynamic Reconfiguration
Stream processors support hundreds of functional units in a programmable architecture by clustering those units and utilizing a bandwidth hierarchy. This paper presents mechanisms to enable dynamic reconfiguration of the number of clusters in a stream processor to match the time varying data parallelism of an application. Many embedded applications go through several phases of execution, marked...
متن کاملImproving Power Efficiency in Stream Processors Through Dynamic Reconfiguration
Stream processors support hundreds of functional units in a programmable architecture by clustering those units and utilizing a bandwidth hierarchy. This paper presents mechanisms to enable dynamic reconfiguration of the number of clusters in a stream processor to match the time varying data parallelism of an application. Many embedded applications go through several phases of execution, marked...
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