Straightforward Methodology for Ultra Low Power Design of a RF LNA in 130 nm CMOS technology

This paper describes a straightforward methodology for ultra low power design of a radiofrequency building block in CMOS technology. This design methodology is based on two parameters: First, the inversion coefficient of the transistor and the extracted equations from the radiofrequency circuits. Second, an optimum tradeoff between the performance key parameters such power consumption, gain, noise, linearity, geometry, etc. In order to demonstrate the effectiveness of this design methodology, it is applied in the design of a low noise amplifier in 130 nm CMOS technology at 2.4 GHz for Industrial, Scientific and Medical frequency band. For just 545 μW of power consumption, the simulated gain of the LNA is equal to 13.5 dB and a noise figure of 1.5 dB with a good matching. Key-Words: Inversion coefficient, CMOS, ultra low power, gm/Id, LNA, ISM