Studies on Design Automation and Arithmetic Circuit Design for Single-Flux-Quantum Digital Circuits

Superconductive single-flux-quantum (SFQ) circuit technology attracts attention as a next generation technology of integrated circuits because of its ultra-fast computation speed and low power consumption. In SFQ digital circuits, unlike CMOS digital circuits, a pulse is used as a carrier of information and the representation of the logic values is different from that in CMOS digital circuits. Therefore, design automation algorithms and structure of arithmetic circuits suitable for SFQ digital circuits are different from those for CMOS digital circuits. In addition, design of SFQ circuits has been carried out largely manually. For advancing studies of SFQ digital circuits, design automation algorithms which can design high-performance SFQ circuits are important. Furthermore, studies of circuit structure suitable for SFQ arithmetic circuits are also important for designing high-performance circuits. In this dissertation, several design automation algorithms and design of a multiplier which is one of the most important arithmetic circuits are proposed for SFQ digital circuits. In Chapter 1, the background and the outline of the dissertation are described. In Chapter 2, the basis of SFQ circuits and the representation of logic values for SFQ digital circuits are described. There are two methods of representation of the logic values. One is ‘dual-rail representation’ in which “1” and “0” lines are used and the other is ‘synchronous clocking representation’ in which synchronizing clocks are used. In Chapter 3, a new method of logic synthesis for dual-rail SFQ digital circuits are proposed. For representing logic functions, a root-shared binary decision diagram (RSBDD) i