Guided Hardware Sharing procedure for Improving Testability
نویسندگان
چکیده
This paper presents a method to carry out the register allocation/binding phase of a High Level Synthesis flow with testability considerations. Testability problems are identified at behavioral level and are eliminated as much as possible during this phase turning testability/area trade-off to account. Proposed method is based on high level normalized testability measures, it allows to improve the testability of datapath-like structures without requiring any lower level DFT techniques.
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