A 9.2mW 528/66/50MHz monolithic clock synthesizer for mobile μP platforms
نویسندگان
چکیده
A low-power monolithic clock synthesizer suitable for use in mobile P platforms is presented. Clock synthesis is accomplished using an all-Si RF LC reference oscillator that does not require an external frequency reference. Fabricated in 0.18 m CMOS, the developed clock synthesizer demonstrates 1% frequency accuracy over process, voltage, and 0-70 C, exhibits 7.4/21/33psrms period jitter on 528/66/50MHz clock signals, and achieves a start-up latency of only 3.2 s.
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