A Low Power Consumption Gilbert - Cell Mixer in 65 nm CMOS Technology
نویسنده
چکیده
In this work, we present a design and simulation of low power consumption down conversion Gilbert-Cell mixer, in the 1.9 GHz wireless application. The circuit is in a 65 nm – CMOS technology at a supply voltage of 1.8 V. The obtained results show a third order input intercept point (IIP3) and a Noise Figure in the order of 1.7 dBm and 3.13 dB respectively, when the conversion gain equal to 13.97 dB, and a power consumed equal to 2mW. These performances justify a Low power, Low Noise and an acceptable Linearity of this mixer compared to others approaches found in the literature.
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