On-Chip Interconnect Inductance - Friend or Foe (Invited)
نویسندگان
چکیده
Inductance associated with on-chip wires can no longer be ignored as chip operation frequencies increase into GHz regime. Because the magnetic field propagates a very long range, the extraction of wire inductance is not just dependent on the immediate neighboring environment. This paper discusses the various difficulties of extracting inductance of randomly placed wires in a typical chip environment. With dedicated return path, the wire inductance can be controlled and benefit the design of high-speed circuits. Specific examples are illustrated.
منابع مشابه
Kant: Friend or Foe of the Believer? Plantinga and Other American Christian Responses to Kant's Epistemology
متن کامل
Design and Measurement of an Inductance-Oscillator for Analyzing Inductance Impact on On-Chip Interconnect Delay
A newly devised inductance-oscillator (iOSC) has been developed which evaluates inductance impact on on-chip interconnect delay. iOSC is a ring oscillator which is comprised of a set of wires each with different loop inductance and accurate on-chip counter. The equivalent distance to the nearest ground grid, which serves as the current return path, is varied to control wire inductance. A test c...
متن کاملAirway Hyperresponsiveness: From Molecules to Bedside Invited Review: Airway wall remodeling: friend or foe?
McParland, Brent E., Peter T. Macklem, and Peter D. Paré. Invited Review: Airway wall remodeling: friend or foe? J Appl Physiol 95: 426–434, 2003;10.1152/japplphysiol.00159.2003.—Airway wall remodeling is well documented for asthmatic airways and is believed to result from chronic and/or short-term exposure to inflammatory stimuli. Airway wall remodeling can contribute to airway narrowing as we...
متن کاملOn-chip inductance cons and pros
This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the undesirable effects of on-chip inductance are higher interconnect coupling noise and substrate coupling, challenges for accurate extraction, the required modifications of the infrastructure of CAD tools, and the inevitably slowe...
متن کاملAn Interconnect Scaling Scheme with Constant On-Chip Inductive Effects
This paper introduces a new global-tier interconnect scaling scheme which ensures that inductance effects do not start dominating the overall interconnect performance. It is shown that for unscaled global lines, inductance effects increase as technology scales while for the scaling scheme proposed by ITRS [1], interconnects become extremely resistive and, while inductance effects diminish with ...
متن کامل