IP qualification of reusable designs

In order to realize System on a Chip (SoC) designs and to meet Time to Market (TTM) window at the same time, the development of a qualification methodology is necessary because transfer of IP modules is crucial. Since design for reuse (IP) is one possibility, but requires a design to be compliant to certain guidelines. This enables a quick integration of an IP module into a system. Detailed guidelines exist which the designer must check manually. Therefore it is nearly impossible to ensure compliance to all guidelines. Thus it is necessary to automate the qualification of IP modules. In today’s design flows several existing tools can be used manually to assure compliance to standards and thus high quality designs. This paper will show that the qualification of the design can be performed in a semi-automatic manner to meet TTM and to avoid resources being bound unnecessarily. The approach proposed also takes care of the packaging of a soft IP module, which typically consists of about one hundred files and some megabytes of data. Furthermore an IP certification phase will also be part of the IP qualification system.