Extending Planar Single-gate Cmos & Accelerating the Realization of Double-gate/multi-gate Cmos Devices
نویسندگان
چکیده
The end of the roadmap for planar single-gate (SG) CMOS seems to be drawing nearer as the industry increases research activities in double-gate (DG) and multi-gate (MG) CMOS novel device structures. Therefore, this paper will focus on how to extend the life of planar SG CMOS through 2016 and accelerate the understanding & realization of MG CMOS by 2007 through the use of advanced ion implantation techniques. The most critical area in future transistor design for improved device performance will be lateral and vertical source drain (S/D) engineering for SG, DG & MG transistor formation with CMOS bulk, epi or SOI technologies and the realization of new novel device structures to satisfy the current and future ITRS device application roadmaps.
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