FPGA Implementation of IP-core of FFT Block for DSP Applications

نویسندگان

  • Bhawesh Sahu
  • Anil Sahu
چکیده

This paper discuss about FPGA implementation of radix-4 FFT algorithm, which is simulated ,synthesized, and downloaded on xcv1000 FPGA, which gives the operating speed of 52.3 MHz. Fourier transform play an important role in many digital signal processing applications including acoustics, optics, telecommunications, speech, signal and image processing. However, their wide use makes their computational requirements a heavy burden in much real world application. Direct computation on discrete Fourier transform requires on the order of N2 operations, where N is the transform size. Most of the research to date for the implementation and bench -marking of FFT algorithm has been performed using general purpose processors. Reconfigurable hardware, usually in the form of FPGA has been used as a new and better means of performing high performance computing. Reconfigurable computing systems are those computing platforms whose architecture can be modified to suit the application at the hand.

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تاریخ انتشار 2014