The Characterizing Substrate Coupling in Deep-submicron Designs Substrate Coupling Ieee Design & Test of Computers
نویسنده
چکیده
levels of circuit functionality in chips designed for compact consumer electronic products and the widespread growth of wireless communications have triggered the proliferation of mixed analogdigital systems. Single-chip designs combining digital and analog blocks built over a common substrate feature reduced levels of power dissipation, smaller package counts, and smaller package interconnect parasitics. Designing such systems, however, is becoming increasingly difficult owing to coupling problems resulting from the combined requirements for high-speed digital and high-precision analog components. Noise coupling caused by the common chip substrate’s nonideal isolation contributes significantly to the coupling problem in mixed-signal designs.1,2 Fast-switching logic components inject current into the substrate, causing voltage fluctuation. Because substrate bias strongly affects the transistor threshold voltage, voltage fluctuations can affect the operation of sensitive analog circuitry through the body effect. Figure 1a illustrates this coupling mechanism, in which a switching digital node injects current into the substrate (currents J1 and J2 are drawn to ground, but J2 affects the analog transistor bulk potential), causing the local substrate potential Vb to vary at an analog node. Figure 1b illustrates this interaction from the circuit viewpoint. Other known mechanisms for current injection into the substrate include hot-carrier injection and parasitic bipolar transistors.2 The effects of substrate coupling largely depend on the layout specifics. Therefore, accurate analysis of these effects is possible only after extraction of the circuit features and the parasitics. As technology and circuit design advance, substrate noise is beginning to plague even fully digital circuits. In these circuits, the cumulative effect of thousands or millions of logic gates changing state across the chip causes current pulses that are injected and absorbed into the substrate. Those currents are then transmitted to power and ground buses through direct feedthrough and load charge and discharge. Such couplings are highly destructive because pulsing currents, partially injected into the substrate through impact ionization and capacitive coupling, can be broadcast over great distances and picked up by sensitive circuits through capacitive coupling and the body effect. The resulting threshold voltage modulation dynamCharacterizing Substrate Coupling in Deep-Submicron Designs Substrate Coupling
منابع مشابه
WLAN Substrate Integrated Waveguide Filter with Novel Negative Coupling Structure
A fourth-degree Substrate Integrated Waveguide (SIW) crossed coupled band pass filter for WLAN band is designed by using a new negative coupling structure. It consists of two U shape microstrip lines on top and bottom planes with via holes at the center of them. This paper investigates the phase characteristics of negative and positive coupling structures and their effects. The design, fabricat...
متن کاملAn Efficient Technique for Substrate Coupling Parasitic Extraction with Application to RF/Microwave Spiral Inductors (RESEARCH NOTE)
This paper presents an efficient modeling method, based on the microstrip lines theory, for the coupling between a substrate backplane and a device contact. We derive simple closed-form formulas for rapid extraction of substrate parasitics. We use these formulas to model spiral inductors as important substrate-noise sources in mixed-signal systems. The proposed model is verified for the freque...
متن کاملDual-Band Evanescent-Mode Substrate Integrated Waveguide Band-pass Filter for WLAN Applications
A new multi-layer substrate integrated waveguide (SIW) structure is developed to design dual-band evanescent-mode band-pass filters (BPFs). Two independent series LC circuits are implemented by incorporating metallic irises in the different layers of the structure. The combination of the metallic irises with capacitive-plates is embedded inside the SIW to independently excite two evane...
متن کاملAnalysis of Gate-Bias-Induced Heating Effects in Deep-Submicron ESD Protection Designs
This paper presents a detailed investigation of the degradation of electrostatic discharge (ESD) strength with high gate bias for deep-submicron salicided ESD protection nMOS transistors, which has significant implications for protection designs where high gate coupling occurs under ESD stress. It has been shown that gate-bias-induced heating is the primary cause of early ESD failure and that t...
متن کاملDelay testing considering crosstalk-induced effects
The increased noise/interference effects, such as crosstalk, power supply noise, substrate noise and distributed delay variations lead to increased signal integrity problems in deep submicron designs. These problems can cause logic errors and/or performance degradation and need to be addressed both in the design for deep submicron and testing for deep submicron phase. Existing delay testing tec...
متن کامل