A Cost Minimization Approach to Synthesis of Linear Reversible Circuits

This paper presents a heuristic cost minimization approach to synthes­ izing linear reversible circuits. Two bidirectional linear reversible circuit syn­ thesis methods are introduced, the Alternating Elimination with Cost Minimiza­ tion method (AECM) and the Multiple CNOT Gate method (MCG). Al­ gorithms, example syntheses, and extensions to these methods are presented. An MCG variant which incorporates line reordering is introduced. Tests com­ paring the new cost minimization methods with the best known method for large circuits are presented. Results show that of the three methods MCG had the lowest average CNOT gate counts for linear reversible circuits up to 24 lines, and that AECM had the lowest counts between 28 and 60 lines.