A Roadmap to Low Cost Flip Chip Technology and Chip Size Packaging using Electroless Nickel Gold Bumping

Flip Chip (FC) Technology is gaining an increased level of importance for a variety of applications based on Flip Chip on Board or Flip Chip in Package. The first driving force for the introduction of this Technology was the need to achieve increased speed and performance along with higher I/O count. A breakthrough, however, will be the use of flip chip due to cost reduction. For this aim it is essential to use low cost bumping techniques in combination with an assembly method compatible to existing SMT processes. The FC techniques presented in this paper are all based on an electroless Ni/Au bumping process. This paper shows a Roadmap based on Electroless Nickel/Gold Bumping for all Flip Chip Interconnection Technologies used in industry today. Additional the Roadmap to future developments in semiconductor industry based on 300 mm wafers and the use of new pad metalisations like copper is shown. The compatibility of Electroless Nickel Bumping especially with these new technologies to be implemented in wafer manufacturing with in the next millenium shows that this key technology offers a Roadmap to Flip Chip Technology not only for the products and wafer technologies in use today but especially for the wafer technologies of the next generation. Figure 1 shows electroless Nickel as a basis for anisotropic conductive adhesive (ACF) Flip Chip Assembly, for polymeric Flip Chip Assembly (conductive adhesive) and for soldering and direct chip attach type of applications using different solder alloys.