Top-gate ZnO nanowire transistors and integrated circuits with ultrathin self-assembled monolayer gate dielectric.

High-performance ZnO nanowire transistors with aluminum top-gate electrodes and naturally formed hybrid self-assembled monolayer/AlO(x) gate dielectric.

A method for the formation of a low-temperature hybrid gate dielectric for high-performance, top-gate ZnO nanowire transistors is reported. The hybrid gate dielectric consists of a self-assembled monolayer (SAM) and an aluminum oxide layer. The thin aluminum oxide layer forms naturally and spontaneously when the aluminum gate electrode is deposited by thermal evaporation onto the SAM-covered Zn...

Microcontact-printed self-assembled monolayers as ultrathin gate dielectrics in organic thin-film transistors and complementary circuits.

We have developed a manufacturing process for organic thin-film transistors and organic complementary circuits in which a microcontact-printed phosphonic acid self-assembled monolayer is employed first as an etch resist to pattern aluminum gate electrodes by wet etching and then as the gate dielectric of the same device. To our knowledge, this is the first report of a printing process for elect...

Vertically stacked individually tunable nanowire field effect transistors for low power operation with ultrahigh radio frequency linearity

Related Articles Low-temperature pseudo-metal-oxide-semiconductor field-effect transistor measurements on bare silicon-oninsulator wafers Appl. Phys. Lett. 101, 092110 (2012) High output current in vertical polymer space-charge-limited transistor induced by self-assembled monolayer Appl. Phys. Lett. 101, 093307 (2012) Influence of dielectric-dependent interfacial widths on device performance in...

High performance ZnO nanowire field effect transistors with organic gate nanodielectrics: effects of metal contacts and ozone treatment

High performance ZnO nanowire field effect transistors (NW-FETs) were fabricated using a nanoscopic self-assembled organic gate insulator and characterized in terms of conventional device performance metrics. To optimize device performance and understand the effects of interface properties, devices were fabricated with both Al and Au/Ti source/drain contacts, and device electrical properties we...

Use of self-assembled monolayers for selective metal removal and ultrathin gate dielectrics in MoS2 field-effect transistors