Implementation of the Advanced SAT Search Techniques in Reconfigurable Hardware

نویسندگان

  • IOULIIA SKLIAROVA
  • ANTÓNIO B. FERRARI
چکیده

This paper presents an application-specific approach to solving the Boolean satisfiability (SAT) problem with the aid of reconfigurable hardware. In the proposed architecture an instance-specific hardware compilation is completely avoided, requiring for each problem instance just the formula information to be downloaded to an FPGA. The previously suggested method of software/reconfigurable hardware partitioning enables problems to be solved that exceed the available FPGA resources. The distinctive feature of this work consists of addressing the possibility of implementation of advanced search techniques such as nonchronological backtracking and conflict clause addition, in reconfigurable hardware. Key-Words: Boolean satisfiability, reconfigurable hardware, software/reconfigurable hardware partitioning

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

FPGA Implementation of JPEG and JPEG2000-Based Dynamic Partial Reconfiguration on SOC for Remote Sensing Satellite On-Board Processing

This paper presents the design procedure and implementation results of a proposed hardware which performs different satellite Image compressions using FPGA Xilinx board. First, the method is described and then VHDL code is written and synthesized by ISE software of Xilinx Company. The results show that it is easy and useful to design, develop and implement the hardware image compressor using ne...

متن کامل

Implementation of VlSI Based Image Compression Approach on Reconfigurable Computing System - A Survey

Image data require huge amounts of disk space and large bandwidths for transmission. Hence, imagecompression is necessary to reduce the amount of data required to represent a digital image. Thereforean efficient technique for image compression is highly pushed to demand. Although, lots of compressiontechniques are available, but the technique which is faster, memory efficient and simple, surely...

متن کامل

Hardware-Accelerated Formal Verification

A semi-formal verification technique, which performs a brute-force compiled simulation with a sophisticated search space pruning, has been proposed and shown to be competitive with the state-of-the-art SAT-based verification techniques [3]. This paper presents a novel approach for accelerating the semi-formal verification by utilizing hardware/software co-execution. To maximize the gain from ha...

متن کامل

A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware

Satisfiability (SAT) is a computationally expensive algorithm central to computer science. In this paper, we present a virtual logic algorithm that allows an FPGA based reconfigurable computing platform to process SAT solver circuits much larger than its available capacity. Our algorithm is based on decomposition techniques that create independent subproblems that fit the size of the available ...

متن کامل

Hardware Implementations of Real-Time Reconfigurable WSAT Variants

Local search methods such as WSAT have proven to be successful for solving SAT problems. In this paper, we propose two host-FPGA (Field Programmable Gate Array) co-implementations, which use modified WSAT algorithms to solve SAT problems. Our implementations are reconfigurable in real-time for different problem instances. On an XCV1000 FPGA chip, SAT problems up to 100 variables and 220 clauses...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2004