An Expandable T1ul Tiprocessor Architecture for Video Graphics an Expandable Multiprocessor Architecture for Video Graphics (prelimina Ry Repor T)

Presented is the design of a flexible expandable multiprocessor system for video graphics and image processing. The design involves a central controller wh ich broadcasts data to a variable number of independently executing processing units, each of which in turn controls a vari able number of memo ry units among whi ch the video (frame buffer) image is distributed. An interl eaved addressing organiza tion o f the v ideo memories guarantees both an even workload distribution as we ll as maintenance of image coherence for each p r ocessing element. Execution speed and image resolution c an be independently a ltered (at any time) by varying th e number of processing and memory units. Sample applications of t he sys tem -for rapid line drawing and "electronic scene generation" (vis i ble surface algor i thms ) -are descr ibed . Va riations o f the design for low cost and fo r powerful , real-t ime configurations are outlined .