Conception of Low Phase Noise RF-VCO Using MOS Varactor

In this paper we propose new oscillator architecture (VCO2) and we compare it with a simple oscillator (VCO1). We describe the design and implementation of the differential LC-VCO for wireless applications. In this work we develop an analytical framework for determining the best VCO for a high-frequency synthesizer design based on the constraints of the application. We show methods for reducing the phase noise in LC-VCO. We describe the optimization of phase noise performance. We examine the effect of the choice of MOS varactor on the performance of a CMOS negative resistance oscillator. The three most common MOS varactor structures (inversion, accumulation, and gated varactor) are well studied. The design of both VCOs was implemented in a standard 0.35μm CMOS process. The VCO 2 is utilized in this study because of its low phase noise. It exhibits a 1.9 GHz frequency at 2 V supply voltage. Phase-noise measurements show a phase-noise of about -90 dBc/Hz at 1MHz from the carrier.