A Reduced-Area Reverse Converter for the Moduli Set {2n, 2n-1, 22n-1-1}

Abstract The three-modulus residue number system (RNS) based on the moduli set {2, 2–1, 2–1} has been recently introduced. The modulo (2+1)-free feature of this set enables it to provide fast realization of modular addition and multiplication circuits of RNS arithmetic unit. But, the latest design of the RNS to binary (reverse) converter for the moduli set {2, 2–1, 2–1} relies on large hardware requirements which is not suitable for efficient VLSI implementation. This work presents an improved design of the reverse converter for the moduli set {2, 2–1, 2–1} based on new Chinese remainder theorem 2 (CRT-II). The proposed converter considerably reduces the converter area and requires less conversion delay compared to the previous design of the reverse converter for the moduli set {2, 2–1, 2–1}.