Comparison of hardware performance of selected Phase II eSTREAM candidates

Five leading Phase 2 Profile 2 eSTREAM candidates have been implemented in hardware, targeting two main semiconductor technologies, Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). An old GSM encryption algorithm A5/1 has been included in the study as well. All six ciphers have been analyzed from the point of view of the hardware efficiency, and two hardware architectures have been developed for each of them. The first of these architectures has been optimized for the minimum area, and the second for the maximum throughput to area ratio. Our study has revealed very large differences among all eSTREAM candidates in terms of the hardware efficiency, and have demonstrated a relative superiority of Trivium and Grain over other analyzed ciphers.