Wng Convolutional Codes with a Vlsi Path Generator Chip
نویسنده
چکیده
منابع مشابه
VLSI Structures for Viterbi Receivers: Part I-General Theory and Applications
A taxonomy of VLSI grid model layouts is presented for the implementation of certain types of digital communication receivers based on the Viterbi algorithm. We deal principally with networks of many simple processors connected to perform the Viterbi algorithm in a highly parallel way. Two interconnection patterns of interest are he “shuffleexchange” and the “cube-connected cycles.” The results...
متن کاملA VLSI convolutional neural network for image recognition using merged/mixed analog-digital architecture
Hierarchical convolutional neural networks are a well-known robust image-recognition model. In order to apply this model to robot vision or various intelligent vision systems, its VLSI implementation with high performance and low power consumption is required. This paper proposes a VLSI convolutional network architecture using a hybrid approach composed of pulse-width modulation (PWM) and digit...
متن کاملPerformance Optimization of VLSI Transceivers forLow - Energy Communications
Performance Optimization of VLSI Transceivers for Low-Energy Communications Systems Andrew P. Worthen, Sangjin Hong, Riten Gupta, and Wayne E. Stark Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor, MI 48109 Abstract|Design of low-energy communications systems requires attention to power consumption in the overall system design and the algorithm impleme...
متن کاملCharacteristic Matrices and Trellis Reduction for Tail-Biting Convolutional Codes
Basic properties of a characteristic matrix for a tail-biting convolutional code are investigated. A tail-biting convolutional code can be regarded as a linear block code. Since the corresponding scalar generator matrix G has a kind of cyclic structure, an associated characteristic matrix also has a cyclic structure, from which basic properties of a characteristic matrix are obtained. Next, usi...
متن کاملA Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture
Hierarchical convolutional neural networks are a well-known robust image-recognition model. In order to apply this model to robot vision or various intelligent vision systems, its VLSI implementation with high performance and low power consumption is required. This paper proposes a convolutional network VLSI architecture using a hybrid approach composed of pulse-width modulation (PWM) and digit...
متن کامل