Interface Trap Analysis using Charge Pump Profiling Techniques in Gate-All- Around Silicon Nanowire Field Effect Transistor

This paper present the electron charge pumping technique using the various charge pumps circuits for interface trap density and edge leakage reduction that is major concern in GAA short channel nanowire structure. Latched and bootstrap charge pump circuit has been simulated and analyzed for GAA structure. The charge pumping technique requires body contact of FET which has been implemented for GAA nanowire structure. Silicon nanowire field-effect-transistors (FETs) are one of the promising and potential candidates for reduction of scaling effect as compared with double gate, fin-FET and planar FETs. Gate-all-around structure having four side of gate material therefore body contact cannot be achieve therefore we have applied different charge pumping mechanism to observe the trap density at the oxide and nanowire interface. Experimental result shows minimum 5.4×1011 cm-2eV-1 trap charge density in GAA nanowire structure.