An 8-bit current mode ripple folding A/D converter

This paper discusses the design of a ripple-folding analog to digital (AID) converter in the current mode technique, which makes the design fully compatible with standard digital CMOS processes. The AID converter, which is designed in TSMC 0.35 Fm CMOS process, achieves 8 hits of resolution at a clock frequency of 100MHz. Simulated results show that the SFDR is better than 62 dB and the DNL and INL are 0.4 LSB. The A/D converter operates from a symmetrical +/-1.65 V supply. ’he power dissipated by the analog circuitry is 1SOmW.