Binary Rf Pulse Compression Experiment at Slac

Using rf pulse compression it will be possible to boost the 50to lOO-MW output expected from high-power microwave tubes operating in the loto 20-GHz frequency range, to the 300to lOOO-MW level required by the next generation of high-gradient linacs for linear colliders. A high-power X-band three-stage binary rf pulse compressor has been implemented and operated at the S&ford Linear Accelerator Center (SLAC). In each of three successive stages; the rf pulse-length is compressed by half, and the peak power is approximately doubled. The experimental results presented here have been obtained at low-power (I-kW) and high-power (15-MW) input levels in initial testing with a TWT and a klystron. Rf pulses initially 770 nsec long have been compressed to 60 nsec. Peak power gains of 1.8 per stage, and 5.5 for three stages, have been measured. This corresponds to a peak power compression efficiency of about 90% per stage, or about 70% for three stages, consistent with the individual component losses. The principle of operation of a binary pulse compressor (BPC) is described in detail elsewhere.’ A schematic of a twostage BPC is shown in Figure 1. It works as follows: Two rf inputs are phase-coded into four time-bins with phases 0 or x, denoted by “+” or ‘-“, respectively. A 3-dBcoupler or “hybrid,” H+in Figure 1, combines the pulse trains to produce two outputs, each at twice the peak power and half the pulse-length, properly phase-coded for the next stage. The compressed pulses are sequential, not coincident. They are made coincident at hybrid H2 by delay Dl. In the second stage, H2 again doubles the peak power and halves the pulse-length. The two compressed pulses again are made coincident by delay D2 (half as long as Dl), so they may be used to energize two accelerator sections of a linac. A three-stage system requires another hybrid and delay-line, and more complex phase-coding.