Eecient Implementations of Pipelined Cordic Based Iir Digital Filters Using Fast Orthonormal -rotations

CORDIC based IIR digital lters possess desirable properties for VLSI implementations such as regularity, local connection, low sensitivity to nite word-length implementation, and elimination of limit cycles. Recently, ne-grain pipelined CORDIC based IIR digital lter architectures which can perform the ltering operations at arbitrarily high sample rates at the cost of linear increase in hardware complexity have been developed. These pipelined architectures consist of only Givens rotations and a few additions which can be mapped onto CORDIC arithmetic based processors. However, in practical applications, implementations of Givens rotations using traditional CORDIC arithmetic are quite expensive. For example, for 16 bit accuracy, using oating point data format with 16 bit mantissa and 5 bit exponent, it will require approximately 20 pairs of shift-add operations for one Givens rotation. In this paper, we propose an eecient implementation of pipelined CORDIC based IIR digital lters based on fast orthonormal-rotations. Using this method, the Givens rotations are approximated by angles corresponding to orthonormal-rotations, which are based on the idea of CORDIC and can perform rotation with minimal number of shift-add operations. We present various methods of construction for such orthonormal-rotations. A signiicant reduction (over 70%) of the number of required shift-add operations is achieved. All types of fast rotations can be implemented as a cascade of only four basic types of shift-add stages. These stages can be executed on a modiied oating-point CORDIC architecture, making the pipelined lter highly suitable for VLSI implementations.