Compression of Ecg Signal Using Discrete Wavelet Transform
نویسندگان
چکیده
In this paper, we describe an ECG signal generation and ECG signal compression module in FPGA. Simulation and Synthesis is done using Xilinx ISE 14.2. Verilog HDL is used for implementation of DWT for ECG signal compression. Biorthogonal 4.4 wavelet family is used for the compression. Keywords— Discrete Wavelet Transform, FIR filter, Bi-orthogonal wavelet
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