Software Level Power Consumption Models and Power Saving Techniques for Embedded DSP Processors

Unlike DSP compilation for high performance, research for low power optimisation has received little attention, although power dissipation is a critical issue for mobile devices. This paper presents an overview of power consumption models and power saving techniques for embedded DSP processors applications and evaluates their application to the Texas Instruments TMS320VC5510 Digital Signal Processor. Software level power consumption models introduced in the literature are presented, along with their advantages and disadvantages. Several power saving techniques are presented, discussing their relevance for the VC5510 processor architecture. The significance of various instruction components with respect to consumption are considered in detail.