Bioinformatic searches using a single-chip shared-memory multiprocessor

† An earlier version of this work has appeared in the Proceedings of the 2003 International Conference on Parallel and Distributed Processing Techniques and Applications. * Corresponding author. Tel.: +1-208-426-5743; fax: +1-208-426-2470. E-mail addresses: [email protected] (S. Smith); [email protected] (J. Frenzel). URL: http://coen.boisestate.edu/ssmith/ Abstract A single-chip shared-memory multiprocessor architecture is introduced which is particularly well suited to common bioinformatic computing tasks. The architecture uses asynchronous bus interfaces to create an integrated circuit design methodology allowing for scaling of the multiprocessor with very little design effort. A key aspect of this design methodology is that it is not necessary to expend significant design resources and chip area on the clock tree. An analysis of the Smith-Waterman alignment algorithm running on this architecture shows that the performance penalty due to increased bus latency compared to a fully synchronous architecture is negligible.