Integrated Testing, Modeling and Failure Analysis of Csp for Enhanced Board Level Reliability

The Wafer Level Chip Scale Package (WLCSP) is gaining popularity for its performance and for its ability to meet miniaturization requirements of certain electronic products, especially handheld devices like cell phones. Due to differential bending between the silicon die and the PCB and the large stiffness difference, board level drop/bend tests are widely accepted methods to evaluate damage in the parts when a handheld device is dropped by the consumer. In addition, the CTE mismatch between the die and PCB require thermal cycling (TC) tests to simulate temperature variations which the package may experience, like being left in a hot car. Through an aggressive product development program which includes experiment and simulation, Amkor has developed the next level of WLCSP (CSPTM), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. Common industrial passing criteria are at least 40 drops before first failure (FF) and at least 500 cycles for thermal cycling FF. With optimal CSP and PCB designs, recent experimental results show that a typical Amkor CSP with a die size of 5.4mm x 5.4mm has a minimum failurefree life of over 1000 drops and survives 500 cycles in TC testing. These results imply that much larger die are possible for future CSP products, opening the door for wider applications of WLCSP devices, e.g. in next-generation portable electronics with greater function integration. This paper will focus on the reliability characterization of CSP drop test performance, with board design recommendations to eliminate board trace failures which could reduce the component’s actual drop test life by 5 to 9 times. The paper demonstrates that CSP can exhibit two distinct failure modes under two different test board designs, resulting in a vast difference in drop test lifetimes. Integrated testing, modeling and failure analysis is performed to understand the failure mechanism of both cases.