A Buffer Management Scheme for Mobile Computers with Hybrid Main Memory and Flash Memory Storages

Recently DRAM and PRAM hybrid main memory organization has been studied in order to address the high levels of energy dissipation in DRAM based main memory. It is expected that this new memory architecture will be used soon in mobile computers which use NAND Flash memory based storages. In such computers, legacy operating system functionalities like file system and memory system should be modified in order efficiently to manage heterogeneous memory organization. In this paper, we study a new buffer cache scheme which considers DRAM/PRAM hybrid main memory and flash memory based storages. The goal of proposed buffer cache scheme is to minimize the number of write operations on PRAM and the number of erase operations on flash memory while maintaining the cache hit ratio. In order to evaluate proposed scheme, we performed trace-driven simulation.